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Behavior of gate-source voltage in bridge configuration: at turn-off

SiC MOSFETs with driver source pins behave differently in the case of the gate-source voltage in the case of a bridge configuration compared to SiC MOSFET products without driver source pins. In the previous article, we covered the behavior of LS (low-side) SiC MOSFETs when they are on. This article will describe the behavior of the low-side SiC MOSFET when it is turned off.

Improved switching losses with driver source pins

Key takeaways from this article

1. TO-247-4L and TO-263-7L packaged SiC MOSFETs with driver source pins, gate-source voltage behavior of SiC MOSFETs compared to TO-247N package products without driver source pins different.
2. In order to correctly implement the surge countermeasures against the gate-source voltage of SiC MOSFETs, it is necessary to understand the behavior of the voltages one by one.

SiC MOSFETs with driver source pins behave differently in the case of the gate-source voltage in the case of a bridge configuration compared to SiC MOSFET products without driver source pins. In the previous article, we covered the behavior of LS (low-side) SiC MOSFETs when they are on. This article will describe the behavior of the low-side SiC MOSFET when it is turned off.

Behavior of gate-source voltage in bridge configuration: at turn-off

Regarding the turn-off behavior of a low-side SiC MOSFET with a driver source pin in a bridge configuration, as in the previous article, the focus will be on the differences from the TO-247N packaged product without a driver source pin.

The figure below shows the switching waveforms at turn-off. The left side is the TO-247N package product without driver source pins, and the right side is the TO-247-4L package product with driver source pins. Each horizontal axis represents time, and the definition of the time range Tk (k=3 to 7) is described below the waveform graph. The circuit diagram at the bottom right shows the gate pin current for the TO-247-4L packaged product in a bridge circuit. In the waveform and circuit diagrams, (IV) to (VII) are used to represent the events that occur in each time range. Event (VII) occurs immediately after the end of the T5 period.

Switching waveforms of low-side SiC MOSFETs in bridge configuration

Definition of time frame

In the waveform comparison, the events (VI) and (VII) of TO-247-4L were different from those of TO-247N.

Event (VI) is the point in time at which the ID changes, which is consistent with turn-on. When the ID_HS of the HS increases sharply, the VF_HS of the body diode rises sharply (dotted circle in the previous waveform). Therefore, the current ICGD due to dVF_HS/dt flows again and a negative surge occurs.

Event (VII) is the electromotive force caused by the energy accumulated in the wiring inductance existing in the current path of ICGD due to the disappearance of dVF_HS/dt at the end of the T5 period and the disappearance of the ID_HS change. It is observed as a positive surge between gate and source. In TO-247N packaged products, this positive surge is almost unobservable.

For a detailed introduction to the turn-off action of TO-247N package products, please refer to the article “Gate-Source Voltage Action when the Low-Side Switch is Turned Off” in the Tech Web Basics SiC Power components Series or the “Shutdown” of the application guide. action of the gate signal”.

To suppress these surges, it is necessary to understand the gate-source voltage behavior described in the previous article and this article, and connect a surge suppression circuit next to the SiC MOSFET as a countermeasure.

For more detailed information, please refer to the “Gate-Source Voltage Surge Suppression Method” in the Application Note or the R class Basics SiC Power Components “SiC MOSFET: Gate-Source Voltage Surge Suppression” method” (in serial).