M. Ceccarelli Esposto – Selex Galileo
The production of military avionics requires special steps such as product acceptance, project certification, and unit testing of the delivered product. These require the design and production of some very complex test systems to simulate the technical environment and detect the device under test. In almost all cases, the I/O interfaces of military avionics have their own proprietary protocol standards, which require special Electronic boards for communication, which also results in a lot of waste of time, money and resources.
Therefore, our company has designed a general-purpose programmable integrated test system. Other companies can easily adapt the system to a variety of different devices. In particular, the industrial engineering department and associated test engineering group from Pomezia in Rome are producing a series of PXI embedded boards that are fully integrated with NI platforms. The latter will implement some of the most classic and commonly used functions required in avionics production inspection. These groups are deploying some of the core systems for PXI testing based on Selex Galileo PXI modules and NI PXI modules as the base platform for general avionics inspection.
Integrated Avionics Test System
In this application task, we need to create an automatic test station to test the new LCD Display for the Tornado fighter-bomber. These monitors feature four monochrome video inputs, each with a non-standard split sync mechanism (timing and amplitude), two RGB video inputs (one per standard protocol, the other non-standard amplitude), one monochrome video The output also has a non-standard separate synchronization mechanism, a standard RGB output and a serial communication bus based on a proprietary protocol.
We developed an application software using LabWindows/CVI and LabVIEW FPGA. The core of the PXI platform consists of an NI PXI-1045 chassis and a NIPXI-8108 controller, two NI PXI-5421 arbitrary waveform generators, a NIPXI-7811R RIO module, a NIPXI-7852RRIO module, and an automatic signal routing matrix And PXI-8432/33/34 composition.
We used two arbitrary waveform generators to generate video components for the non-standard monochrome interface at the same time, and used the PXI-7811R module to generate two field line sync signals for reconstruction of the STANAG 3350 Class B sync signal so that the Signals generated by the components with non-standard synchronization mechanisms can be used for video output on a common display. The PXI-7852R module manages the dedicated serial bus. We added a small piece of circuitry to the PXI core platform to coordinate the different levels of each signal.
We developed an application software to manage the PXI-5421 module. Based on two different bitmap images of appropriate resolution, the user can generate interleaved monochrome video components to meet the requirements of the DUT’s monochrome video input interface. Whenever the PXI-5421 module starts to generate a new half-field signal and a new line signal, the arbitrary waveform generator provides a start trigger for the PXI-7811R, which will follow the special characteristics of the monochrome video interface. On request, start generating separate sync signals for fields and lines. Because we needed this test to be as flexible as possible in managing the sync pulses, we chose a Field Programmable Gate Array (FPGA) module to generate these pulses. After considering the available programming capacity, speed and cost, the PXI-7811R module is the best choice.
The PXI-7811R module also receives two non-standard separate sync signals from the monochrome interface of the unit under test. On the falling edge of each field sync pulse, a corresponding line sync signal change edge can distinguish the odd and even half fields. For proper matching, the system can generate a unique sync signal that has the characteristics of a STANAG 3350 Class B sync signal. The system recombines the sync signals produced by the video components and sends them to the composite video, blanking, and sync (CVBS) input of the general-purpose display to visualize the monochrome video output of the unit under test.
The PXI-7852 module manages the dedicated serial bus communication protocol, and the PXI-7811 processes the video signal sent back by the DUT while generating the video signal sent to the DUT through the PXI-5421. The protocol contains two signal channels, one channel is single output, one channel is single input, the input channel accepts 32-bit messages, and the output channel transmits 40-bit messages. Each channel is implemented by two physical signal lanes, one for the clock lane and the other for the data lane. The receive channel will also be responsible for decoding received messages (serial data restoration), isolating errors, extracting data, and presenting the results on the test station display.
The send channel needs to be able to convert the messages read on the text script into serial messages for transmission, as well as be able to identify erroneous input. Because these protocols are non-standard, the system requires a very flexible design that can respond to different needs with minimal time and cost. We chose the NI-7852R FPGA Module because when combined with the LabVIEW FPGA Module, it will help us achieve all our goals.
We use LabWindows/CVI to develop a graphical user interface, manage all the commands, control the instrumentation of the station, and parse the functions that implement automated testing. We wrote the VIs using LabVIEW software and functions in the LabVIEW FPGA Module related to the video interface and serial communication. The VIs created in LabVIEW were then linked into the LabWindows/CVI main program to meet all the requirements for testing the unit. Figures 2 and 3 show two graphical codes written in LabVIEW that can generate video components from a bitmap file and implement serial bus transmission.
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