For those who wish to get a jump on learning about the 67th annual IEDM, scheduled for December 11–15, 2021 at the Hilton San Francisco Union Square hotel under the theme “Devices for a New Era of Electronics: From 2D Materials to 3D Architectures,” this news release provides descriptions of these educational offerings.
Tutorials and Short Courses will provide attendees with the invaluable knowledge and information needed to advance the state-of-the-art.
IEDM Tutorials – Saturday, Dec. 11
Now in their 12th year, the 90-minute Saturday tutorial sessions on emerging technologies and specialized topics have become a hugely popular part of IEDM. They are presented by experts in the respective areas, the goal being to bridge the gap between textbook-level knowledge and leading-edge current research. The topics for 2021 are:
2:45 p.m. – 4:15 p.m.
• Beyond the FinFET Era: Challenges and Opportunities for CMOS Technology, Kai Zhao, IBM
• TCAD-Based DTCO and STCO, Asen Asenov, University of Glasgow
• 6G Technology Challenges from Devices to Wireless Systems, Aarno Pärssinen, Oulu
4:30 p.m. – 6:00 p.m.
• Selective and Atomic-Scale Processes for Advanced Semiconductor Manufacturing, Robert Clark, TEL
• Machine Learning for Semiconductor Device and circuit Modeling, Elyse Rosenbaum, University of Illinois, Urbana-Champaign
• GaN Power Device Technology and Reliability, Dong Seup Lee, Texas Instruments
IEDM Short Courses – Sunday, Dec. 12
In contrast to the Tutorials, the full-day IEDM Sunday Short Courses are focused on a single technical topic. Early registration is recommended, as they are often sold out. They offer the opportunity to learn about important areas and developments, and to network with global experts.
• Future Scaling and Integration Technology, organized by Dechao Guo, IBM Research
o Processes and Materials Engineering Innovations for Advanced Logic Transistor Scaling,
Benjamin Colombeau, Applied Materials
o Interconnect Resistivity: New Materials, Daniel Gall, Rensselaer Polytechnic Institute
o Metrology and Material Characterization for the Era of 3D Logic and Memory, Roy Koret,
o Beyond FinFET Devices: GAA, CFET, 2D Material FET, Chung-Hsun Lin, Intel o Heterogenous Integration Using Chiplets & Advanced Packaging, Madhavan
Swaminathan, Georgia Tech
o Design-Technology Co-Optimization/System-Technology Co-Optimization, Victor Moroz,
• Emerging Technologies for Low-Power Edge Computing, organized by Huaqiang Wu, Tsinghua University and John Paul Strachan, Forschungszentrum Jülich
o Mobile NPUs for Intelligent Human/Computer Interaction, Hoi-Jun Yoo, KAIST
o Brain-Inspired Strategies for Optimizing the Design of Neuromorphic Sensory-Processing
Systems, Giacomo Indiveri, University of Zurich
o Memory-Based AI & Data Analytics Solutions, Euicheol Lim, SK hynix
o Material Strategies for Memristor-Based AI Hardware and their Heterointegration,
Jeehwan Kim, MIT
o RRAM Devices for Data Storage and In-Memory Computing, Wei Lu, University of
o Practical Implementation of Wireless Power Transfer, Hubregt Visser, IMEC
• A vendor exhibition will be held once again. Further information about IEDM
For registration and other information, visit www.ieee-iedm.org.
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IEEE is the world’s largest technical professional organization dedicated to advancing technology for the benefit of humanity. Learn more at http://www.ieee.org.