Microchip’s PIC32MZ is a 200MHz 32-bit embedded MCU with up to 2MB Flash, 512KB RAM, 10/100 Ethernet MAC, Hi-Speed USB MAC/PHY and two CAN ports, processor performance up to 330 DMIPS and 3.28 CoreMark/MHz, Supports WQVGA images for a new generation of embedded devices. This article describes the PIC32MZ main features and block diagrams, the MIPS32® microAptiv microprocessor core main features and block diagrams, and the PIC32MZ Embedded Connectivity (CE) Starter Board main features, schematics, bill of materials and PCB Component layout diagram.
The PIC32MZ Embedded Connectivity family of 200 MHz 32-bit microcontrollers feature up to 2 Mbytes of flash, 512 Kbytes of RAM, a 10/100 Ethernet MAC, Hi-Speed USB MAC/PHY, and dual CAN ports. The processors yield 330 DMIPS and 3.28 CoreMark/MHz performance, with an interrupt latency of only 10 clock cycles, and have direct support for a WQVGA graphics.
The chips are said to have class-leading code density and have a 28 Ms/s 12-bit A/D converter and a crypto engine with a random number generator. They use Imagination’s MIPS microAptiv core, which includes 159 DSP instructions that enable algorithms with up to 75% fewer cycles than previous MCU versions. QFN, TQFP, VTLA, and LQFP packages with 64 to 144 pins are available starting in December and priced from 6.68 ea/10,000. A starter kit is available.
PIC32MZ main features:
•2.2V to 3.6V, -40ºC to +85ºC, DC to 200 MHz
•2.2V to 3.6V, -40ºC to +125ºC (Planned)
Core: 200 MHz (up to 330 DMIPS) microAptiv™
• 16 KB I-Cache, 4 KB D-Cache
•MMU for optimum embedded OS execution
•microMIPS™ mode for up to 35% smaller code size
-Four 64-bit accumulators
-Single-cycle MAC, saturating and fractional math
•Code-efficient (C and Assembly) architecture
•0.9% internal oscillator
•Programmable PLLs and oscillator clock sources
•Fail-Safe Clock Monitor (FSCM)
•Independent Watchdog Timers (WDT) and Deadman Timer (DMT)
•Fast wake-up and start-up
•Low-power modes (Sleep and Idle)
•Integrated Power-on Reset and Brown-out Reset
• 50 MHz External Bus Interface (EBI)
• 50 MHz Serial Quad Interface (SQI)
Audio and Graphics Interfaces
•Graphics interfaces: EBI or PMP
•Audio data communication: I2S, LJ, and RJ
•Audio control interfaces: SPI and I2C™
•Audio master clock: Fractional clock frequencies with USB synchronization
High-Speed (HS) Communication Interfaces (with Dedicated DMA)
•USB 2.0-compliant Hi-Speed On-The-Go (OTG) controller
•10/100 Mbps Ethernet MAC with MII and RMII interface
•Crypto Engine with a RNG for data encryption/decryption and authentication (AES, 3DES, SHA, MD5, and HMAC)
•Advanced memory protection:
-Peripheral and memory region access control
Direct Memory Access (DMA)
•Eight channels with automatic data size detection
•Programmable Cyclic Redundancy Check (CRC)
Advanced Analog Features
•12-bit ADC module:
-28 Msps with six Sample and Hold (S&H) circuits
-Up to 48 analog inputs
•Flexible and independent ADC trigger sources
•Two comparators with 32 programmable voltage references
•Temperature sensor with ±2ºC accuracy
•Two CAN modules (with dedicated DMA channels):
-2.0B Active with DeviceNet™ addressing support
•Six UART modules (25 Mbps):
-Supports LIN 1.2 and IrDA® protocols
•Six 4-wire SPI modules (50 Mbps)
•SQI configurable as an additional SPI module (50 MHz)
•Five I2C modules (up to 1 Mbaud) with SMBus support
•Parallel Master Port (PMP)
•Peripheral Pin Select (PPS) to enable function remap
Timers/Output Compare/Input Capture
•Nine 16-bit or up to four 32-bit timers/counters
•Nine Output Compare (OC) modules
•Nine Input Capture (IC) modules
•PPS to enable function remap
•Real-Time Clock and Calendar (RTCC) module
•5V-tolerant pins with up to 32 mA source/sink
•Selectable open drain, pull-ups, and pull-downs
•External interrupts on all I/O pins
Qualification and Class B Support
•AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) planned
•Class B Safety Library, IEC 60730
•Back-up internal oscillator
Debugger Development Support
•In-circuit and in-application programming
•4-wire MIPS® Enhanced JTAG interface
•Unlimited software and 12 complex breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
•Non-intrusive hardware-based instruction trace
Software and Tools Support
•C/C++ compiler with native DSP/fractional support
• MPLAB® Harmony Integrated Software Framework
•TCP/IP, USB, Graphics, and mTouch™ middleware
•MFi, Android™, and Bluetooth® audio frameworks
• FreeRTOS™, OpenRTOS®, μC/OS™, and other popular RTOS kernels
Figure 1. PIC32MZ Block Diagram
The MIPS32® microAptiv™ Microprocessor Core is the heart of the PIC32MZ EC family device processor. The CPU fetches instructions, decodes each instruction, fetches source operands, executes each instruction and writes the results of instruction execution to the proper destinations.
Main features of the MIPS32® microAptiv microprocessor core:
•32-bit address and data paths
•MIPS32® Enhanced Architecture (Release 2):
-Multiply-accumulate and multiply-subtract instructions
-Targeted multiply instruction
-Zero/One detect instructions
-Conditional move instructions (MOVN, MOVZ)
-Programmable exception vector base
-Atomic interrupt enable/disable
-GPR shadow registers to minimize latency for interrupt handlers
-Bit field manipulation instructions
-Virtual memory support
•microMIPS™ compatible instruction set:
-Improves code size density over MIPS32®, while maintaining MIPS32® performance.
-Supports all MIPS32® instructions (except branch-likely instructions)
-Fifteen additional 32-bit instructions and 39 16-bit instructions corresponding to commonly-used MIPS32® instructions
-Stack pointer implicit in instruction
-MIPS32® assembly and ABI compatible
•MMU with Translation Lookaside Buffer (TLB) mechanism:
-16 dual-entry fully associative Joint TLB
-4-entry fully associative Instruction TLB
-4-entry fully associative Data TLB
-4 KB pages
•Separate L1 data and instruction caches:
-16 KB 4-way Instruction Cache (I-Cache)
-4KB 4-way Data Cache (D-Cache)
•Autonomous Multiply/Divide Unit (MDU):
-Maximum issue rate of one 32×32 multiply per clock
-Early-in iterative divide. Minimum 12 and maximum 38 clock latency (dividend (rs) sign extension-dependent)
-Minimum frequency: 0 MHz
-Low-Power mode (triggered by WAIT instruction)
-Extensive use of local gated clocks
•EJTAG Debug and Instruction Trace:
-Support for single stepping
-Virtual instruction and data address/value breakpoints
-Hardware breakpoint supports both address match and address range triggering.
-Eight instruction and four data complex breakpoints
•iFlowtrace® version 2.0 support:
-Real-time instruction program counter
-Special events trace capability
-Two performance counters with 34 user-selectable countable events
-Disabled if the processor enters Debug mode
•Four Watch registers:
-Instruction, Data Read, Data Write options
-Address match masking options
•DSP ASE Extension:
-Native fractional format data type operations
-Register Single Instruction Multiple Data (SIMD) operations (add, subtract, multiply, shift)
-DSP Control Access
-Multiplication of complex operands
-Variable bit insertion and extraction
-Virtual circular buffers
-Arithmetic saturation and overflow handling
-Zero-cycle overhead saturation and rounding operations
Figure 2. Block Diagram of the MIPS32® microAptiv Microprocessor Core
PIC32MZ Embedded Connectivity (CE) Starter Board
The PIC32MZ EC Starter Kit provides the easiest and lowest cost method to experience the high performance and advanced peripherals integrated in the PIC32MZ Embedded Connectivity MCUs. This starter kit features a socket that can accommodate 10/100 Ethernet transceiver (RJ-45) plug-in connectors from various vendors for prototyping and development.
The starter kit comes preloaded with demonstration software for the user to explore the new features of the PIC32MZ EC family of devices. It is also expandable through a modular expansion interface, which allows the user to extend its functionality. The starter kit also supplies on- board circuitry for full debug and programming capabilities
The PIC32MZ Embedded Connectivity (EC) Starter Kit contains the following items:
• PIC32MZ Embedded Connectivity (EC) Starter Kit development board
• SMSC 8870A Ethernet PHY daughter board
• USB mini-B to full-sized A cable – USB debug cable to debug and power the starter kit development board
• USB micro-B to full-sized A cable – PIC32 USB cable to communicate with the PIC32 USB port
• RJ-45 CAT5 Ethernet patch cable – Ethernet CAT5 cable to communicate with the PIC32 Ethernet port
PIC32MZ Embedded Connectivity (CE) Starter Board Key Features:
On-board PIC32MZ2048ECH144: 200 MHz, 2 MB Flash and 512 KB RAM
CAN 2.0b, HI-Speed USB 2.0 host/device/dual-role/OTG
4 MB SQI Flash
Can be used with Multimedia Expansion Board II
Can be used with PIC32 Expansion Board using a PIC32MZ adaptor board
Figure 4. Top Top components of the PIC32MZ Embedded Connectivity (CE) Starter Board
1. PIC32MZ2048ECH144-I/PH (non-crypto) or PIC32MZ2048ECM144-I/PH (crypto) 32-bit microcontroller.
2. Green power indicator LED.
3. On-board crystal or oscillator for precision microcontroller clocking (12 MHz).
4. USB connectivity for on-board debugger communications.
5. Green debug indicator LED.
6. Three push button switches for user-defined inputs.
7. Three user-defined indicator LEDs.
8. USB Type A receptacle connectivity for PIC32 host-based applications.
9. HOST mode power jumper.
10. Daughter board connectors for flexible Ethernet PHY options.
11. 32 kHz oscillator for RTCC and Timer1 (optional).
12. External 2 GB SQI memory for expanded memory applications.
13. Jumper for using or disconnecting the on-board debugger.
Figure 5. PIC32MZ Embedded Connectivity (CE) Starter Board Bottom Key Components
1. PIC24FJ256GB106 USB microcontroller for on-board debugging.
2. Regulated +3.3V power supply for powering the starter kit through USB or expansion board.
3. Connector for various expansion boards.
4. USB Type micro-AB receptacle for OTG and USB device connectivity for PIC32 OTG/device-based applications.
5. 50 MHz Ethernet PHY oscillator.
6. USB Host and OTG power supply for powering PIC32 USB applications
Figure 6. PIC32MZ Embedded Connectivity (CE) Starter Board Block Diagram
Figure 7. PIC32MZ Embedded Connectivity (CE) Starter Board Circuit Diagram (1)
Figure 8. PIC32MZ Embedded Connectivity (CE) Starter Board Circuit Diagram (2)
Figure 9. PIC32MZ Embedded Connectivity (CE) Starter Board Circuit Diagram (3)
Figure 10. PIC32MZ Embedded Connectivity (CE) Starter Board Circuit Diagram (4)
PIC32MZ Embedded Connectivity (CE) Starter Board Bill of Materials (BOM):
For details, see: