“Board design is a critical and time-consuming task, and any problems require engineers to go through the entire design, net-by-net, component-by-component. It can be said that circuit board design requires as much care as chip design.
Board design is a critical and time-consuming task, and any problems require engineers to go through the entire design, net-by-net, component-by-component. It can be said that circuit board design requires as much care as chip design.
A typical circuit board design flow consists of the following steps:
The first three steps take the most time because schematic checking is a manual process. Imagine a SoC board with 1000 or more wires. Manually checking every single wire is a tedious task. In fact, it is nearly impossible to check every single wire, which can lead to problems with the final board, such as wrong wires, floating nodes, etc.
The schematic capture stage generally faces the following types of problems:
● Underline error: such as APLLVDD and APLL_VDD
● Case issues: such as VDDE and vdde
● spelling mistakes
● Signal short circuit problem
● …and many more
To avoid these errors, there should be a way to check the entire schematic in seconds. This approach can be implemented using schematic simulation, which is rarely seen in current board design flows. Schematic simulation allows viewing of the final output at the required nodes, so it automatically checks for any connection issues.
An example of a project is explained below.
Consider a typical block diagram of a circuit board:
In a complex board design, the number of wires can be in the thousands, and very few changes can waste a lot of time checking.
Schematic simulation not only saves design time, but also improves board quality and increases the efficiency of the overall process.
A typical device under test (DUT) has some of the following signals:
The device under test will have various signals after some preconditioning, and there are various modules, such as voltage regulators, op amps, etc., for signal conditioning. Consider an example of a supply signal through a voltage regulator:
Figure 3: Schematic of the sample board.
Schematic simulation was used in order to verify the connection relationship and perform an overall check. Schematic simulation consists of schematic creation, testbench creation, and simulation.
During the creation of the test bench, a stimulus signal is given to the necessary inputs, and then the output results are observed at the signal points of interest.
The above process can be achieved by connecting probes to nodes to be observed. Node voltages and waveforms can indicate errors in the schematic. All signal connections are automatically checked.
Figure 4: Schematic testbench and simulated values for each node.
Let’s take a look at a part of the image above, where the probed nodes and voltages are clearly visible:
So with the help of simulation, we can directly observe the results and confirm that the circuit board schematic is correct. In addition, the investigation of design changes can be achieved by carefully adjusting the excitation signal or component values. Schematic simulation can therefore save a lot of time for board design and inspection personnel and increase the chances of design correctness.
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