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Phase-Coherent FSK Modulation Using Multichannel DDS

A common single-channel direct digital frequency synthesizer (DDS) produces the phase-continuous frequency transition shown in Figure 1. But in applications such as coherent pulsed Doppler radar and NMR/MRI spectroscopy for medical and materials analysis, phase-coherent conversion is preferred. This article shows how to configure the AD9958/AD9959 multichannel DDS to implement a stable phase-coherent frequency-shift keying (FSK) modulator by stacking the DDS outputs.

Multichannel DDS virtually eliminates the channel-to-channel temperature and timing issues encountered when synchronizing multiple single-channel devices. The multi-channel DDS outputs, although independent of each other, share the same system clock and thus track temperature and power-supply deviations better than the outputs of multiple single-channel devices. Therefore, multi-channel DDS is more suitable for generating phase-coherent frequency conversion at the superposition output.

Figure 1. Phase-continuous and phase-coherent frequency conversion.

circuit description
The AD9520 clock distribution device drives the AD9958 DDS with a high performance reference clock while providing the same clock to the FSK data stream source. The AD9520 offers multiple output logic options and adjustable delays to meet setup and hold times between the FSK data stream and the multichannel DDS SYNC_CLK.

The two independent channels of the AD9958 operate with preprogrammed frequencies F1 and F2. Connect the outputs together for stacking. Profile pins drive the multipliers on each DAC input to control the output amplitude, and these pins turn the channel output on or off to select the desired frequency. For this purpose, each multiplier is preprogrammed with two mode selectable settings: zero-scale and full-scale. A logic low on the mode pin turns off the sine wave, while a logic high passes it to the output. This operation requires two complementary input data streams to alternate between frequencies. Note that the two DDS channels continuously generate frequencies F1 and F2. The shutdown function will cancel the corresponding DDS output, resulting in a phase-coherent FSK signal.

Figure 2. Phase-coherent FSK modulator setup.

The AD9959 4-channel DDS produces the results shown in Figure 3. Two additional channels can be used as a phase reference for the two switching frequencies at the summed output to facilitate the account of phase-coherent switching. The superimposed outputs shown in the waveforms above represent phase-coherent switching. The middle two waveforms show the reference signals F1 and F2. The waveform below shows a pseudorandom sequence (PRS) data stream alternating between two frequencies. Note that due to pipeline delays within the device, the PRS data stream edges are not perfectly aligned with the frequency translation of the superimposed output.

Figure 3. Measured phase-coherent FSK transition.

Figure 4 shows an example of a phase-continuous FSK switch also produced by the AD9959. This operation requires less bandwidth, but there is no phase storage between transitions.

Figure 4. Measured phase-continuous FSK transition.

Analog Devices offers a variety of direct digital frequency synthesizers, clock distribution chips, and clock buffers for building DDS-based clock generators. For more information, visit and

Multi-Channel, 10-Bit, 500 MSPS Direct Digital Synthesizer
The 2-channel AD9958AD9958 (Figure 5) and 4-channel AD9959 direct digital synthesizer (DDS) contain two/four 10-bit, 500 MSPS current output DACs. All channels share the same system clock and are therefore inherently synchronized; interconnecting multiple devices provides higher channel counts. The frequency, phase, and amplitude of each channel can be independently controlled, allowing the device to correct for system-dependent mismatches. All parameters can be swept linearly; or 16 levels can be selected for FSK, PSK or ASK modulation. The output sine wave tuning has 32 bits of frequency resolution, 14 bits of phase resolution, and 10 bits of amplitude resolution. The AD9958/AD9959 operate from a 1.8 V core supply, compatible with 3.3 VI/O supply logic, and consume 315 mW/540 mW (all channels on) and 13 mW (power-down mode). Specified over the –40°C to +85°C temperature range, it is available in a 56-pin LFCSP package and is priced at $20.48/$37.59/piece in 1,000-piece quantities.

Figure 5. AD9958 functional block diagram.

12 LVPECL/24 CMOS output clock generator
The AD9520-x clock generators (Figure 6) can derive up to 12 LVPECL or 24 CMOS clocks from a single reference frequency. The device achieves sub-picosecond jitter performance thanks to an integrated full PLL with built-in VCO, programmable dividers and configurable output buffers. Four options provide center frequencies from 1.45 GHz to 2.95 GHz for the on-chip VCO; the fifth option operates with an external VCO up to 2.4 GHz. The device accepts one differential or two single-ended reference clocks up to 250 MHz and provides four sets of LVPECL clocks (three in each set) up to 1.6 GHz. The programmable divider has a ratio of 1 to 32 and can set the output frequency and coarse delay for each group of clocks. Each LVPECL output can be reconfigured to provide two 250MHz CMOS outputs. The AD9520-x operates from a single 3.3 V supply and consumes a maximum of 1.5 W; separate output driver and charge pump supplies are available for logic compatibility and support for VCOs with extended tuning range. The device is packaged in a 64-pin LFCSP and is specified over the –40°C to +85°C temperature range, and is priced at $12.65/piece in 1,000-piece quantities.

Figure 6. AD9520 Functional Block Diagram.