AMD has released a new Epyc (Xiaolong) 7003 series processor, codenamed “Milan”. The processor is based on Zen 3 cores and AMD Infinity architecture, with up to 32 MB of L3 cache per core, achieving a 19% IPC improvement compared to the second-generation processor “Roma”.
On Monday, local time, AMD released a new Epyc (Xiaolong) 7003 series processor, codenamed “Milan”, equipped with the new Zen 3 architecture released in October last year. The Epyc “Milan” server chips have roughly the same specs as the Ryzen 5000-series CPUs: multiple cores, high boost clock frequencies, a 19 percent increase in single-core performance, and a huge advantage over rival Intel.
According to AMD’s official website data, the EPYC 7003 series processors are built on the Zen 3 core and AMD Infinity architecture, with a full set of functions and features: advanced I/O, 7nm x86 CPU process technology, and on-chip integrated security processors.
The EPYC 7003 processor features up to 32 MB of L3 cache per core, support for 4-6-8 memory channel interleaving for better price/performance in multi-DIMM configurations, and clock synchronization between its interconnect and memory, all of which All will lead to better and faster results.
AMD Epyc processor.
It is reported that AMD released the “Milan” server chip, aiming to seize more market share from rival Intel. Compared to consumer PCs and workstations, AMD’s competition with Intel is more pronounced in server chips. Even after AMD started to dominate multi-threaded performance, Intel still held the lead in single threading. This lead tends to disappear in 2020, but Intel can still deliver nearly the same single-threaded performance as AMD, albeit crushed in full-threaded performance.
It is reported that AMD has completed the design of the chip and commissioned TSMC to use the 7nm chip process technology to achieve mass production.
Leading all-round Intel Xeon Scalable processors
Compared with the second-generation 7nm process Epyc Rome processor released by itself in 2019, AMD Epyc “Milan” has completed the transition from Zen 2 architecture to Zen 3 architecture, and is different from the desktop Ryzen 5000 series CPU Not much.
But compared to Intel Xeon processors, Epyc “Milan” is faster and can do more with less physical space and power. The graph below shows the different development curves of AMD Epyc processors and Intel Xeon processors, where Epyc processors achieved rapid progress in 2017, surpassing Intel Xeon, and continued to lead the way in the following years:
In addition, we can see that in 2017 and 2018, the gap between AMD Epyc and Intel Xeon Scalable was not too big, but in 2019 AMD made a real giant leap with the introduction of Zen 2 architecture.
In concrete terms, the AMD Epyc 7763 system ran 2.12 times more VDI desktop sessions than the Intel Xeon Platinum 8280 system:
AMD CEO Su Zifeng at the press conference.
For high-performance computing (HPC) and cloud computing workloads, AMD Epyc processors with 3rd Gen Zen architecture outperform rival Intel by 106%:
In enterprise workloads, AMD Epyc processors improved by 117%. In addition, even down from the 64-core Eypc 7763 to the 32-core 75F3, its performance is still 70% better than Intel’s best performance.
Architectural changes for Epyc processors from Rome to Milan
Milan achieved a 19% improvement in IPC, mainly due to its new Zen 3 architecture, which has improved branch prediction, a wider execution pipeline, and an increase in load/store operations per clock cycle.
The Zen 3 architecture also provides a more uniform L3 cache design than Zen 2. Zen 2/Rome provides 16MiB of L3 cache per quad core group, while Zen 3/Milan provides 32MiB of L3 cache per octa core group. Although the L3 cache per core is still 4MiB, for workloads where multiple cores share data, the more unified design of Zen 3 can save cache space better.
If the L3 cache data for an eight-core is 3MiB, then the second-generation Roman processor needs 6MiB, and it needs to make one copy in each quad-core group. The third-generation “Milan” processor can save 3MiB of cache, and only 3MiB can serve eight cores, which also means that a single core can handle more L3 cache. The result is faster core-to-cache communication for large workloads with a corresponding reduction in effective memory latency.
AMD Epyc processors have a better reputation for security than Intel Xeon processors. Starting with Epyc Rome, Spectre and Spectre V4 attacks can be mitigated by hardware and OS/Hypervisor. The newly released “Milan” processor supports Secure Nested Paging, which provides protection for trusted virtual machines from untrusted virtual machine monitors, and Milan also provides A new feature – CET Shadow Stack.
This feature provides a mirror of the return address, protecting against Return Oriented Programming (ROP) attacks. This enables the system to detect and mitigate attacks, even if a stack overflow attack is successfully implemented, it cannot attack the shadow stack. This feature requires a software update for the operating system/hypervisor.
Epyc “Milan” CPU model
There are 19 models of Epyc “Milan” processors, including 15 dual-socket and 4 single-socket models, with core counts ranging from 8 to 64 cores (16 to 128 threads per socket), down to 8 cores 72F3 (3.70-4.10GHz, 180W TDP), up to 64-core 7763 (2.45-3.50GHz, 280W TDP).
All “Milan” models offer simultaneous multi-threading (single-core dual-thread), 8-channel DDR4-3200 RAM, 128 lane PCIe4, secure memory encryption, secure encryption virtualization, and more.
Its SKUs are divided into three categories:
The highest single-core performance, the third digit in the name of this type of SKU is the letter “F”, from the 8-core 180W 72F3 to the 32-core 280W 75F3;
Optimized for maximum cores/threads per socket with “76” or “77” in the name, from 48C/225W 7643 to 64C/280W 7763.
Other SKU names start with 73, 74, 75 and are meant to be “balanced” to optimize performance and TCO.
Also, if there is a “P” in the SKU name, it means this is a single socket model.
AMD vs. Intel
AMD says the “Milan” data center processors are faster than Intel’s best current data center chips. It is understood that the chip was designed by AMD and commissioned by TSMC to use its 7-nanometer chip process for production.
In contrast, Intel’s consistent approach is “integration of chip design and manufacturing.” However, Intel’s chip process technology has lagged behind in recent years. AMD “Milan” chips and second-generation “Roma” chips have surpassed Intel chips, which has helped AMD seize market share. For example, Google abandoned Intel chips and switched to AMD data center processors.
Dan McNamara, AMD’s senior vice president and general manager of the server business unit, said he believes AMD will stay ahead as long as it continues to integrate customer feedback into each generation of chips.
“We’ve produced our third-generation processors, which we think are the top CPUs for the data center. If we continue this pace, we’ll remain highly competitive,” Dan said.
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